Eliminated from:
EVS93xx-EK V8.1, EVS93xx-CK V8.1
Behaviour of the new version?
The PHINT5-OUT output position is set to the correct value (PHINT5-SET signal input) when being loaded in an edge-triggered way via the PHINT5-LOAD input.
What happens?
The PHINT5-OUT position output of the integrator does not correspond to the value selected at the PHINT5-SET signal input.
When does the problem occur?
The problem occurs if the integrator has been loaded in an edge-triggered way via the corresponding control input PHINT5-LOAD if, in addition, the upper integration limit (PHINT5-H-VALUE input signal) has changed. The first task cycle after mains connection already triggers the change mentioned since the integration limit has been initialised with zero before.
Possible diagnostics?
The problem can be detected if zero speed is applied to PHINT5-DFIN. If, in this state, the edge-triggered loading via PHINT5-LOAD = FALSE => TRUE is activated the PHINT5-SET and PHINT5-OUT output values differ from each other if the upper integration limit at PHINT5-H-VALUE has changed before.
Short-term measures/recommendations?
Instead of the edge-triggered loading, the level-triggered loading via the corresponding PHINT5-RESET control input is to be used.
Evaluation:
Usually integrators are loaded in a level-triggered way and in this case via the PHINT5-RESET control input. The edge-triggered loading is rather rarely used.
The PHINT5 block has only been included in the device series as of firmware V7.1. As a result, very few applications have been implemented with it. Consequently the function restriction does not occur very often.
