Hiperface-DSL (OCT): PPI validation status bit 'Pole position is valid' (0x2C65:3) is incorrectly reset after mains switching (corrected from V01.08.00)

Corrected from:
Servo Inverter i950 FW: from V01.08.00
 
Response of the new version:
Hiperface-DSL encoders (OCT encoders) are now correctly treated as absolute encoders by the firmware. 
Accordingly, the PPI monitoring now works correctly and the PPI validation status bit 'Pole position is valid' (0x2C65:3) is set or reset correctly.

 
What happens?
Absolute encoder Hiperface-DSL:
With position feedback using OCT encoders (one-cable technology), the PPI validation status bit 'Pole position is valid' (0x2C65:3) is reset after switching to mains, despite the correctly reconstructed position.
The reason for this is that OCT encoders are not marked with the attribute 'absolute encoder' within the firmware.

When does the behaviour occur?
  • Absolute encoder Hiperface-DSL (OCT encoder) as position feedback and
  • PPI monitoring is activated.
Which products are affected?
Servo Inverter i950 FW
 
Short-term measures / evaluation / recommendations:
As a short-term measure, it is possible to deactivate the PPI monitoring under parameter 0x2C60.


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